Weekly Blog #29- Speeches

My invite is complete- and everyone is invited! I finally finished formatting and proofing my invitation which will go out next week or so. I chose the dark green color with the faint orange line to match my board design, which resembles a green chip. Before I get into the more difficult tasks (like the 30 minute speech), I wanted to mention how something as "simple" as an invitation required a lot of proofing and attention to detail. I had originally missed paying attention to symmetry, like spacing at the top and bottom, and articles, like "of" or "to." Even the fonts and sizes took a lot of messing around with. Our teacher emphasized that the little aspects show professionalism and appeal to guests.

However, the most important issue to consider right now is my speech. How will I prepare a 30-minute speech that captivates the audience yet demonstrates the skills and knowledge that I've gained? In my experience, after half-memorizing my Original Work speech and research/intro speech, I've realized that rote practice and memorization are the only ways to successfully execute a long speech. I'm not one who can eloquently improvise with only a basic outline- I end up cutting out important topics, talk too quickly, or use too many filler words. As much as I don't like the aspect of writing, memorizing, and rehearsing a 30-minute speech, I recognize that it is the best way for me to deliver a memorable presentation. I am starting to prepare it this week, and we will see where I'm headed next time!

Weekly Blog #28- Logic Gates

This week, I met with my mentor to discuss plans for Final Product. We decided that a logic gate demonstration with lights would be a good interactive portion of my presentation, so next week we plan to test it out. One of my original ideas for Final Product was to create a kid-friendly game or kit involving logic gates, so if the demonstration test run works smoothly, I might try to develop that idea. As for programming the IC chip, we decided that it may not be feasible to purchase a chip and download and learn that specific program. However, I will continue my research on the functions and applications of different IC chips, watch tutorials, and read example code to get a good idea of what I might be exposed to.

As FPN approaches, I've decided to amp up the design/marketing aspect of my topic. Electrical engineering doesn't attract the most excitement or interest for most people, so I'll probably add lights to my invitation and find more ways to incorporate interactive and eye-catching designs. Additionally, a lot of the people I'm inviting will be attending other students' presentations, so I want to maintain a large audience.

Weekly Blog #27- FPN Presentation

This week, I finally claimed my room for FPN! I kept receiving the regretful "sorry, 4 people already asked me" response, but luckily, I managed to get the SPED room which not a lot of people thought about claiming. This room is the first one down the 2nd history hall and is conveniently located to the right, which Mr. Wysong says is the direction people tend to turn to. As I have completed my invitation and program design, my next big area of focus is the speech and final product. The speech is due pretty soon, which means that I will need to finish a large part of my final product if I want something to talk about during the 35 minute presentation. Although final product is due on May 20th, the speech is due in mid- to late-April. Looking back, I really should have started the speech about two weeks ago. Last week was packed and the next two weeks will be pretty hectic, with college visits, tests, and AP mock exams. It is truly never too early to start planning, because my future self will thank me immensely. At least I can say that this will give me some insight for college when I have mid-terms and finals!

Weekly Blog #26- Invitations and Programs

This week, I finished my invitation design and I am almost done with my program! As I prepare to finish putting together my portfolio, I'm starting to see the amount of time all this "setup" takes. Balancing time spent on final product and immediate assignments has been a struggle for me, but at least my eyes have been opened to how quickly this deadline is approaching. With prom this week, college visits next week, and AP tests coming up, I realize that my final product must be treated as an immediate assignment too.

Last week, I found a website that had level-by-level code and simulations for learning VHDL. I clicked on the very first demo (basic logic gates) and was pretty confused by the code and simulation. After more searching, I've found a site that has really good explanations of IC chips, thoroughly explaining every basic concept I will need to know (http://www.learnabout-electronics.org/Digital/dig21.php). However, I was a bit curious if the use of multiple gates (especially in the NAND case) for lower cost might slow down the process or increase size. I'll see what my mentor has to say!